Senior Silicon Physical Design Engineer- €75k to €100k – Italy – Remote

Due to our continued growth, our semiconductor client is looking for an Senior Silicon Physical Design Engineer  join their cutting-edge engineering team who are creating the next-generation AI platform to support anyone who wants to help advancing humanity and improve the world.

As a Senior Silicon Physical Design Engineer , you will play a crucial role in developing cutting-edge multi-core in-memory compute SoCs. Leveraging your expertise in ASIC Physical Design from RTL to GDS, you will be responsible for synthesis, floorplanning, place and route, extraction, timing analysis, physical verification, EMIR signoff, and formal verification. You will collaborate closely with architecture and RTL teams to ensure successful project execution.

Senior Silicon Physical Design Engineer Expected contributions:

• Perform synthesis, floorplanning, place and route, extraction, timing analysis, and physical verification.
• Ensure timing closure, constraint generation, and optimization.
• Execute clock tree synthesis (CTS) and clock-building techniques.
• Integrate IPs including memories, I/Os, embedded processors, DDR, networking fabrics, and analog IPs.
• Utilize EDA tools such as Primetime, StarRC, Genus, Innovus, Design Compiler, ICC/ICC2, FC, and Calibre.
• Develop automation scripts in Python, Tcl, or Perl.
• Debug and solve technical challenges related to physical design.
• Collaborate with architecture, RTL, and verification teams.

Senior Silicon Physical Design Engineer qualifications and skills:

• 10+ years of experience in Physical Design (RTL to GDS).
• Strong communication and teamwork skills.
• Expertise in synthesis, timing analysis, and timing closure.
• Hands-on experience with leading EDA tools (Primetime, StarRC, Genus, Innovus, Design Compiler, ICC/ICC2, FC, Redhawk, and Calibre).
• Proficiency in clocking techniques and CTS.
• Experience in IP integration across various domains.
• Strong scripting skills (Python, Tcl, or Perl).
• Proven problem-solving and debugging capabilities.
• Fluent in English (spoken and written). Italian not required.

Senior Silicon Physical Design Engineer highly desirable skills:

• Experience in top-level integration and I/O ring design.
• Knowledge of chip-package-board co-simulation and packaging.
• Ability to influence design methodologies and tool flows.
• Experience working with EDA vendors to resolve tool issues.
• Understanding of semiconductor device physics and multi-domain design.

Salary and Package:

• Competitive Salary: €75k to €100k
• Attractive compensation package
• Pension plan
• Extensive employee insurances
• Option on Company shares.
• Fully Remote or Hybrid Onsite – You choose
• Training and Development
• Visa Sponsorship available
• Relocation Support (if required) – This position is based Italy (in hybrid or remote set up). My client will support relocation to Bologna, Florence or Milan if required.

An open culture that supports creativity and continual innovation is awaiting you.

My client can offer a 3-stage process consisting of a 1^st stage Video Call , 2^nd Stage Video Call and a 3rd Stage on-site Interview (meet the team and site tour). This process can be completed within 2-3 weeks (based on availability)