Principal / Fellow – GPU/CPU Performance Modelling

We are supporting a specialist processor architecture organisation with the appointment of a senior technical leader to own and strengthen its performance modelling capability.

This is not a generic SoC modelling, virtual-platform or performance-analysis position.

The requirement is for someone with genuine experience modelling the performance and behaviour of programmable processors at a microarchitectural level. GPU experience would be ideal, although deep CPU performance-modelling expertise is also highly relevant.

The successful candidate will define modelling strategy, develop or evolve processor-performance models and use those models to influence architectural decisions across future generations of compute and graphics IP.

The position could suit a Principal, Distinguished Engineer, Fellow, Principal Architect or experienced modelling leader. The exact title will reflect the person appointed.

Role and Responsibilities

• Own and evolve performance-modelling strategy across next-generation GPU and processor architectures
• Lead the development of functional, timing, cycle-approximate or cycle-accurate processor models
• Model critical microarchitectural structures such as pipelines, schedulers, execution units, caches and memory hierarchies
• Enable early architectural exploration before RTL implementation
• Analyse workloads, identify architectural bottlenecks and predict performance across proposed designs
• Evaluate performance, power, area, accuracy and simulation-speed trade-offs
• Validate modelling accuracy against RTL, FPGA prototypes, silicon measurements or benchmark data
• Ensure modelling results directly inform architectural and product decisions
• Work closely with GPU/CPU architects, RTL design, verification, compiler and software teams
• Provide technical leadership, mentoring and modelling best practice across senior engineering teams
• Help build and develop a high-calibre processor-modelling capability

Essential Experience

• Substantial GPU or CPU processor-performance modelling experience
• Strong understanding of processor microarchitecture and how architectural structures affect performance
• Experience modelling several of the following:
  • Instruction or shader pipelines
  • Instruction scheduling
  • Execution units
  • Cache hierarchies
  • Memory latency and bandwidth
  • Branch prediction or out-of-order execution
  • Warp, wavefront or shader scheduling
  • Workload behaviour and architectural bottlenecks
• Experience with functional, timing, cycle-approximate or cycle-accurate simulation
• Evidence that modelling work has influenced processor architecture, RTL implementation or silicon decisions
• Strong C++ engineering capability
• Experience developing or owning sophisticated simulation and modelling frameworks
• Credibility to influence senior architects and engineering leaders
• Technical leadership across a modelling platform, product family, processor generation or team

Relevant Additional Experience

Experience in several of the following would be valuable:

• GPU compute or graphics architecture
• CPU microarchitecture
• SystemC or TLM
• gem5 or comparable processor-simulation environments
• Trace-driven simulation
• Architecture exploration
• ISA and workload modelling
• RTL correlation and validation
• Hardware/software co-design
• Compiler interaction with processor performance
• PPA and architectural trade-off analysis
• Building or managing performance-modelling teams

Important Domain Distinction

This position requires deep programmable-processor modelling experience.

Candidates whose experience is primarily in generic SoC modelling, virtual platforms, network-performance modelling or system-level simulation without clear CPU/GPU microarchitectural depth are unlikely to be suitable.

NPU or accelerator-modelling experience may be relevant where it is supported by substantial programmable-processor, GPU or CPU modelling expertise.

Leadership Scope

Leadership may come through:

• Building or managing processor-modelling teams
• Owning modelling strategy across multiple products or processor generations
• Acting as a senior technical authority
• Mentoring experienced modelling and architecture engineers
• Influencing architecture roadmaps and senior engineering decisions

The successful candidate must be motivated to own and advance performance modelling as a core technical discipline.

Why Consider This Opportunity?

• Ownership of a strategically important processor-modelling capability
• Significant influence over future GPU and compute architectures
• Scope to reshape modelling strategy, frameworks and working practices
• Direct collaboration with senior architecture and engineering leadership
• Complex microarchitectural problems with measurable product impact
• Senior technical or leadership positioning without title constraints
• Opportunity to build a capability rather than inherit a narrowly defined engineering role

Salary and Package

• £160,000–£220,000 base salary, depending on experience and level
• 30% annual bonus
• Potential total compensation of approximately £208,000–£286,000
• Flexible/hybrid working arrangements
• Pension
• Private medical insurance
• Life assurance
• Income protection
• Training and professional development

Application Process

My client offers a streamlined 3-stage interview process:

• Stage 1: Technical Screening (45 minutes)
• Stage 2: Technical Panel Interview (2 hours 10 minutes)
• Stage 3: HR / Final Discussion

The process can typically be completed within 2-4 weeks, depending on candidate availability.